Simula3MS has been developed by Computer Architecture Group of the University of A Coruña. It implements the simulator of a basic architecture in three different versions: monocycle, multicycle and pipeline; intended to be used in the laboratory of the undergraduate Computer Architecture Courses. Currently, it has thee diferent simulation options: Input/Output simulation, brach techniques and datapath. Last option allows to choose between different datapath configurations: monocycle, multicycle, pipeline, Scoreboard and Tomasulo algorithm.

Processor simulators are widely used with pedagogical purposes due to their enviroment is less dangerous than a real machine, moreover mistakes can be detected, physical computer components are not modified and simulator enviroment gives more posibilities than a real computer.


Simula3MS is aimed at Computer Architecture study, in which you can see and apply the adquired knowledge during the lectures. It has a friendly graphical enviroment which allows the user to debug their programms easily, observe the memory evolution, as well as the instruccion execution on different datapaths. Depending on chosen processors characteristics Simula3MS permits the user to observe the same code execution on different configurations.


Simula3MS implements an instruction subset based on MIPS R2000/R3000 instruction repertory. First window consists of an editor where the instruction syntax is analysed before leading to the execution window. During execution the user can observe the evolution of the data segment, registers and the rest of the elements involved in the execution. Simula3MS has also a floating point co-processor and includes two Input/Output management techniques: polling and interrupts I/O.